Proposal: Bipartite Supervalidator Architecture
RejectedPR- SIG
- needs-SIG
- Champion
- —
- Author org
- MVMT Inc.
- Ask
- source pending
Abstract
This proposal separates CPU-bound cryptographic operations (ECIES view encryption/decryption, Speedy reinterpretation) from IO-bound state management (BFT consensus, sequencer DB writes, ACS updates) into two independently scalable machine classes. A proof-of-concept using Canton's actual crypto primitives demonstrates 4x throughput improvement and 7x latency reduction at 32 concurrent transactions. The architecture is backward-compatible and opt-in — existing Daml applications require no changes.
Milestones
| Title | Due date | Target | Amount (CC) |
|---|---|---|---|
| Design & Proof of Concept Validation | — | — | — |
| Core Implementation — A Node (Crypto Engine) | — | — | — |
| Core Implementation — B Node (State Coordinator) + Integration | — | — | — |
| Production Hardening & Documentation | — | — | — |
| Deployment on Global Synchronizer TestNet | — | — | — |
| Total | — | ||
Budget impact
- % of approved-to-date
- —
- % if all RFV pass
- —
RFV scenario unavailable — using approved-to-date as denominator (degraded mode).
- Ask (CC)
- amount pending
Comments by org
1 comment · 1 org · last activity Oct 22, 2026
| Organisation | Comments |
|---|---|
| Canton Foundation | 1 |